The ODT-LUP-2I3O-7 is a latch-up detection solution that can support integration into advanced FinFET process nodes such as 7nm/6nm. 

The IP works in conjunction with applicable PCB monitoring points solution includes both internal and PCB elements with 2 analog inputs and from 1-3 digital output ports. A threshold with 5mV minimum sensitivity and 100mV minimum operating range can be configured with 1mV increments. Programmable filtering is used to reduce the impact of glitches and false positives, and interrupts are provided when a failure occurs.  The IP can be configured via an APB interface.